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Microelectronics Engineering Department at RIT in collaboration with Ohio State University and Naval Research Lab (NRL) is conducting a research in integrating Si-based tunnel diodes with CMOS technology. This three-year project is funded by the National Science Foundation (NSF).
This webpage is intended as a communicational tool for information sharing among RIT team members and to update the institutions involved of what has been done at RIT SMFL laboratory. This site will provide progress report on the project, learning from discussion and experimental results and related resources.
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Si/SiGe RITD-CMOS Integration |
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